• Blog Stats

    • 60,355 hits
  • Categories

  • Archives

Grid Computing Tunes Tiny Transistors for Future Chips

Grid Computing Tunes Tiny Transistors for Future Chips
BBC News (12/04/09)

The U.K. e-science grid is being used to run simulations of transistors smaller than 30 nanometers, which will help designers manage the physical constraints that come into effect when working on such a small scale.  Hundreds of thousands of tiny transistors have already been simulated, using about 20 years worth of processing time.  The researchers hope to understand how such small components function and determine the best way to produce future generations of nanoscale chips.  “What we do in these simulations is try to predict the behavior of these devices in the presence of atomic-scale effects,” says the University of Glasgow’s Asen Asenov, who is leading the NanoCMOS simulation project.  The current generation of chips features transistors about 32 nanometers in size, but manufacturers want to move to transistors with even smaller components.  “What’s happening at such dimensions is that the atomic structure of the transistor cannot be precisely controlled,” Asenov says.  “In order to make them work we have to put in impurities to define different regions.”  The researchers are learning how to best deploy materials so transistors provide reliable and dependable performance at the nanoscale.
http://news.bbc.co.uk/2/hi/technology/8393454.stm

Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s

%d bloggers like this: